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features ? 32k x 8 organization ? wide voltage range, 2.7v to 3.6v dc ? +12.5v programming voltage ? fast access time: 120/150/200/250 ns ? totally static operation ? completely ttl compatible ? operating current: 10ma @ 3.6v, 5mhz ? standby current: 10ua ? package type: - 28 pin plastic dip - 32 pin plcc - 28 pin 8 x 13.4mm tsop( i ) 8 x 13.4mm 28 -tsop( i ) general description the mx27l256 is a 256k-bit, one-time programmable read only memory. it is organized as 32k by 8 bits, operates from a single + 3volt supply, has a static standby mode, and features fast single address location programming. all programming signals are ttl levels, requiring a single pulse. for programming from outside the system, existing eprom programmers may be p/n: pm0248 block diagram symbol pin name a0~a14 address input q0~q7 data input/output ce chip enable input oe output enable input vpp program supply voltage nc no internal connection vcc power supply pin gnd ground pin pin description pin configurations pdip rev. 3.6, aug. 26, 2003 plcc used. the mx27l256 supports intelligent fast program- ming algorithm which can result in programming time of less than ten seconds. this eprom is packaged in industry standard 28 pin dual-in-line packages, 32 lead plcc, and 28 lead tsop (i ) packages. 1 mx27l256 256k-bit [32kx8] low voltage operation cmos eprom 1 2 3 4 5 6 7 8 9 10 11 12 13 14 vpp a12 a7 a6 a5 a4 a3 a2 a1 a0 q0 q1 q2 gnd 28 27 26 25 24 23 22 21 20 19 18 17 16 15 vcc a14 a13 a8 a9 a11 oe a10 ce q7 q6 q5 q4 q3 mx27l256 1 4 5 9 13 14 17 20 21 25 29 32 30 a8 a9 a11 nc oe a10 ce q7 q6 a6 a5 a4 a3 a2 a1 a0 nc q0 q1 q2 gnd nc q3 q4 q5 a7 a12 vpp nc vcc a14 a13 mx27l256 oe a11 a9 a8 a13 a14 vcc vpp a12 a7 a6 a5 a4 a3 22 23 24 25 26 27 28 1 2 3 4 5 6 7 a10 ce q7 q6 q5 q4 q3 gnd q2 q1 q0 a0 a1 a2 21 20 19 18 17 16 15 14 13 12 11 10 9 8 mx27l256 control logic output buffers q0~q7 ce oe a0~a14 address inputs y-decoder x-decoder y-select 256k bit cell maxtrix vcc gnd vpp . . . . . . . . . . . . . . . .
2 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 auto identify mode the auto identify mode allows the reading out of a binary code from an eprom that will identify its manufacturer and device type. this mode is intended for use by programming equipment for the purpose of automatically matching the device to be programmed with its corresponding programming algorithm. this mode is functional in the 25 c 5 c ambient temperature range that is required when programming the mx27l256. to activate this mode, the programming equipment must force 12.0 0.5 (vh) on address line a9 of the device. two identifier bytes may then be sequenced from the device outputs by toggling address line a0 from vil to vih. all other address lines must be held at vil during auto identify mode. byte 0 ( a0 = vil) represents the manufacturer code, and byte 1 (a0 = vih), the device identifier code. for the mx27l256, these two identifier bytes are given in the mode select table. all identifiers for manufacturer and device codes will possess odd parity, with the msb (q7) defined as the parity bit. read mode the mx27l256 has two control functions, both of which must be logically satisfied in order to obtain data at the outputs. chip enable (ce) is the power control and should be used for device selection. output enable (oe) is the output control and should be used to gate data to the output pins, independent of device selection. assuming that addresses are stable, address access time (tacc) is equal to the delay from ce to output (tce). data is available at the outputs toe after the falling edge of oe, assuming that ce has been low and addresses have been stable for at least tacc - toe. standby mode the mx27l256 has a cmos standby mode which reduces the maximum vcc current to 10 ua. it is placed in cmos standby when ce is at vcc 0.3 v. the mx27l 256 also has a ttl-standby mode which reduces the maximum vcc current to 0.25 ma. it is placed in ttl-standby when ce is at vih. when in standby mode, the outputs are in a high-impedance state, independent of the oe input. functional description the programming of the mx27l256 when the mx27l256 is delivered, or it is erased, the chip has all 256k bits in the "one" or high state. "zeros" are loaded into the mx27l256 through the procedure of programming. for programming, the data to be programmed is applied with 8 bits in parallel to the data pins. vcc must be applied simultaneously or before vpp, and removed simultaneously or after vpp. when programming an mxic eprom, a 0.1uf capacitor is required across vpp and ground to suppress spurious voltage transients which may damage the device. fast programming the device is set up in the fast programming mode when the programming voltage vpp = 12.75v is applied, with vcc = 6.25 v and oe = vih (algorithm is shown in figure 1). the programming is achieved by applying a single ttl low level 100us pulse to the ce input after addresses and data line are stable. if the data is not verified, an additional pulse is applied for a maximum of 25 pulses. this process is repeated while sequencing through each address of the device. when the programming mode is completed, the data in all address is verified at vcc = vpp = 5v 10%. program inhibit mode programming of multiple mx27l256s in parallel with different data is also easily accomplished by using the program inhibit mode. except for ce and oe, all like inputs of the parallel mx27l256 may be common. a ttl low-level program pulse applied to an mx27l256 ce input with vpp = 12.5 0.5 v and oe high will program that mx27l256. a high-level ce input inhibits the other mx27l256s from being programmed. program verify mode verification should be performed on the programmed bits to determine that they were correctly programmed. the verification should be performed with ce and oe at vil, and vpp at its programming voltage.
3 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 two-line output control function to accommodate multiple memory connections, a two- line control function is provided to allow for: 1. low memory power dissipation, 2. assurance that output bus contention will not occur. it is recommended that ce be decoded and used as the primary device-selecting function, while oe be made a common connection to all devices in the array and connected to the read line from the system control bus. this assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. system considerations during the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of chip enable. the magnitude of these transient current peaks is dependent on the output capacitance loading of the device. at a minimum, a 0.1 uf ceramic capacitor (high frequency, low inherent inductance) should be used on each device between vcc and gnd to minimize transient effects. in addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on eprom arrays, a 4.7 uf bulk electrolytic capacitor should be used between vcc and gnd for each eight devices. the location of the capacitor should be close to where the power supply is connected to the array. mode select table pins mode ce oe a0 a9 vpp outputs read vil vil x x vcc dout output disable vil vih x x vcc high z standby (ttl) vih x x x vcc high z standby (cmos) vcc 0.3v x x x vcc high z program vil vih x x vpp din program verify vih vil x x vpp dout program inhibit vih vih x x vpp high z manufacturer code(3) vil vil vil vh vcc c2h device code(3) vil vil vih vh vcc 10h 4. see dc programming characteristics for vpp voltage during programming. notes: 1. vh = 12.0 v 0.5 v 2. x = either vih or vil 3. a1 - a8 = a10 - a14 = vil(for auto select)
4 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 start address = first location vcc = 6.25v vpp = 12.75v x = 0 program one 100us pulse increment x x = 25? verify byte last address vcc = vpp = 5.25v device passed verify all bytes ? device failed increment address interactive section verify section fail pass yes pass no yes no fail figure 1. fast programming flow chart fail ?
5 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 switching test circuits switching test waveforms 2.0v 0.8v test points input 2.0v 0.8v output ac testing: ac driving levels are 2.4v/0.4v for both commercial grade and industrial grade. input pulse rise and fall times are < 20ns. ac driving levels device under test diodes = in3064 or equivalent cl = 100 pf including jig capacitance 6.2k ohm 1.8k ohm +5v cl
6 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 absolute maximum ratings rating value ambient operating temperature -40 o c to 85 o c storage temperature -65 o c to 125 o c applied input voltage -0.5v to 7.0v applied output voltage -0.5v to vcc + 0.5v vcc to ground potential -0.5v to 7.0v a9 & vpp -0.5v to 13.5v notice: stresses greater than those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended period may affect reliability. notice: specifications contained within the following tables are subject to change. dc characteristics symbol parameter min. max. unit conditions voh output high voltage vcc -0.3 v ioh = -100ua, vcc =3.0v vol output low voltage 0.3 v iol = 2.1ma, vcc =3.0v vih input high voltage 2.0 vcc + 0.5 v vil input low voltage -0.3 0.6 v ili input leakage current -10 10 ua vin = 0 to 3.6v ilo output leakage current -10 10 ua vout = 0 to 3.6v icc3 vcc power-down current 10 ua ce = vcc 0.3v icc2 vcc standby current 0.25 ma ce = vih icc1 vcc active current 10 ma ce = vil, f=5mhz, iout = 0ma, vcc = 3.6v ipp vpp supply current read 10 ua ce = oe = vil, vpp = vcc capacitance ta = 25 o c, f = 1.0 mhz (sampled only) symbol parameter min. max. unit conditions cin input capacitance 8 12 pf vin = 0v cout output capacitance 8 12 pf vout = 0v vpp vpp capacitance 18 25 pf vpp = 0v mx27l256 -12 -15 -20 -25 operating temperature commercial 0 c to 70 c0 c to 70 c0 c to 70 c0 c to 70 c industrial -40 c to 85 c -40 c to 85 c -40 c to 85 c -40 c to 85 c vcc power supply 2.7v to 3.6v 2.7v to 3.6v 2.7v to 3.6v 2.7v to 3.6v dc/ac operating conditions for read operation
7 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 ac characteristics 27L256-12 27l256-15 27l256-20 27l256-25 symbol parameter min. max. min. max. min. max. min. max. unit conditions tacc address to output delay 120 150 200 250 ns ce = oe = vil tce chip enable to output delay 120 150 200 250 ns oe = vil toe output enable to output delay 60 70 100 120 ns ce = vil tdf oe high to output float, 0 40 0 50 0 60 0 70 ns or ce high to output float toh output hold from address, 0 0 0 0 ns ce or oe which ever occurred first ac programming characteristics ta = 25 c 5 c symbol parameter min. max. unit conditions tas address setup time 2.0 us toes oe setup time 2.0 us tds data setup time 2.0 us tah address hold time 0 us tdh data hold time 2.0 us tdfp output enable to output float delay 0 130 ns tvps vpp setup time 2.0 us tvcs vcc setup time 2.0 us toe data valid from oe 150 ns tpw pgm program pulse width 95 105 us dc programming characteristics ta = 25 o c 5 c symbol parameter min. max. unit conditions voh output high voltage 2.4 v ioh = -0.40ma vol output low voltage 0.4 v iol = 2.1ma vih input high voltage 2.0 vcc + 0.5 v vil input low voltage -0.3 0.8 v ili input leakage current -10 10 ua vin = 0 to 3.6v vh a9 auto select voltage 11.5 12.5 v icc3 vcc supply current(program & verify) 40 ma ipp2 vpp supply current(program) 30 ma ce = vil, oe = vih vcc1 fast programming supply voltage 6.00 6.50 v vpp1 fast programming voltage 12.5 13.0 v
8 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 waveforms read cycle fast programming algroithm waveform address inputs data out oe ce data address valid data tdf tacc tce toe toh addresses ce oe data vpp vcc vih vil vpp1 vcc vcc1 vcc vih vil vih vil data out valid hi-z data in stable tas tvps tvcs toe max tpw tds tdh toes tdfp tah program verify program
9 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 plastic package part no. access time(ns) operating standby operating package current max.(ma) current max.(ua) temperature mx27l256pc-12 120 10 10 0 c to 70 c 28 pin dip mx27l256qc-12 120 10 10 0 c to 70 c 32 pin plcc mx27l256tc-12 120 10 10 0 c to 70 c 28 pin tsop( i ) mx27l256pc-15 150 10 10 0 c to 70 c 28 pin dip mx27l256qc-15 150 10 10 0 c to 70 c 32 pin plcc mx27l256tc-15 150 10 10 0 c to 70 c 28 pin tsop( i ) mx27l256pc-20 200 10 10 0 c to 70 c 28 pin dip mx27l256qc-20 200 10 10 0 c to 70 c 32 pinplcc mx27l256tc-20 200 10 10 0 c to 70 c 28 pin tsop( i ) mx27l256pc-25 250 10 10 0 c to 70 c 28 pin dip mx27l256qc-25 250 10 10 0 c to 70 c 32 pin plcc mx27l256tc-25 250 10 10 0 c to 70 c 28 pin tsop( i ) mx27l256pi-12 120 10 10 -40 c to 85 c 28 pin dip mx27l256qi-12 120 10 10 -40 c to 85 c 32 pin plcc mx27l256ti-12 120 10 10 -40 c to 85 c 28 pin tsop( i ) mx27l256pi-15 150 10 10 -40 c to 85 c 28 pin dip mx27l256qi-15 150 10 10 -40 c to 85 c 32 pin plcc mx27l256ti-15 150 10 10 -40 c to 85 c 28 pin tsop( i ) mx27l256pi-20 200 10 10 -40 c to 85 c 28 pin dip mx27l256qi-20 200 10 10 -40 c to 85 c 32 pinplcc mx27l256ti-20 200 10 10 -40 c to 85 c 28 pin tsop( i ) mx27l256pi-25 250 10 10 -40 c to 85 c 28 pin dip mx27l256qi-25 250 10 10 -40 c to 85 c 32 pin plcc mx27l256ti-25 250 10 10 -40 c to 85 c 28 pin tsop( i ) ordering information
10 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 package information
11 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256
12 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256
13 p/n:pm0248 rev.3.6, aug. 26, 2003 mx27l256 revision history revision no. description page date 3.0 1) eliminate interactive programming mode. 6/17/1997 2) add 28-tsop(i) package offering 3) ac driving levels are changed from 2.4v/0.3v to 2.4v/0.4v. 3.1 ipp1 100ua-->10ua 7/17/1997 3.2 cancel ceramic dip package type p1,2,9,11 feb/29/2000 3.3 remove 28-pin sop package p1,9 sep/19/2001 package information format changed p10~12 3.4 remove "ultraviolet erasable" wording p1 apr/24/2002 3.5 to modify package information p10~12 nov/19/2002 3.6 to modify 32-plcc package information p11 aug/26/2003 a1: from 0.50mm(0.020 inch)/nom. to 0.58mm(0.023 inch)/nom. from 0.66mm(0.026 inch)/nom. to 0.81mm(0.032 inch)/nom.
mx27l256 m acronix i nternational c o., l td. headquarters: tel:+886-3-578-6688 fax:+886-3-563-2888 europe office: tel:+32-2-456-8020 fax:+32-2-456-8021 japan office: tel:+81-44-246-9100 fax:+81-44-246-9105 singapore office: tel:+65-348-8385 fax:+65-348-8096 taipei office: tel:+886-2-2509-3300 fax:+886-2-2509-2200 m acronix a merica, i nc. tel:+1-408-453-8088 fax:+1-408-453-8488 chicago office: tel:+1-847-963-1900 fax:+1-847-963-1909 http : //www.macronix.com macronix international co., ltd. reserves the right to change product and specifications without notice.

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